T&S Verification Planning Matrix Hack Session

Tuesday 08/15
1:30pm - 3:00pm
Aster 2

This is one of four subsystem verification planning matrix hack sessions (one for each major subsystem).  The purpose of this session is to collaboratively work on filling in additional blanks in LSE-60, LSE-62 and all T&S-related LSE ICDs verification planning matrices.  The goal is to make substantive process towards identifying the verification owner, level, verification method(s), verification requirement (description of verification activities proposed), and success criteria for requirements that have not been addressed previously.

Organizer: 
Brian Selvy
Suggested Audience: 
Systems Engineering (Project-level and T&S) and T&S subject matter experts

Slides